The present disclosure relates to an information processing apparatus executing image processing by using, for example, a GPU (Graphics Processing Unit), and an information processing method.
In recent years, enhanced performance and high functionality of general-purpose computer hardware enable image processing by using general-purpose computer hardware, which only dedicated hardware was able to implement before. In the general-purpose computer hardware, specifically, CPUs (Central Processing Unit) and RAMs (Random Access Memory) used as main memories exhibit extremely high speed, and as a result, complicated effect processing with respect to large-capacity image data may be performed in an economic and satisfying time period.
Image processing may be performed at a further higher speed by introducing GPU (Graphics Processing Unit) which is an arithmetic processing device designed so as to be specialized in parallel arithmetic processing. The parallel arithmetic processing by GPU is implemented by a mechanism including issuing the same instructions to a plurality of arithmetic units and executing the same instructions by the respective arithmetic units independently. To the contrary, in CPU, different instructions are issued to a plurality of arithmetic units and the arithmetic units execute different instructions, respectively. Therefore, GPU may exhibit enhanced performance in processing in which arithmetic results of part of processing do not affect the entire processing such as image processing. To the contrary, CPU is suitable for sequential processing.
Further, recently, a technical field of GPGPU (General-Purpose computing on Graphics Processing Units) which enables GPU not only to perform image processing but also to be used for other numerical processing is known.
Japanese Patent Application Laid-open No. 2008-98911 (paragraphs 0057, 0068, and 0072) (hereinafter referred to as Patent Document 1) describes that, in a case where a GPU executes effect processing on data a plurality of times, in order to reduce the number of transferring/receiving data for each effect processing between a system memory and the GPU, the GPU executes effect processing a plurality of times through exchange of data between buffers provided in a GPU memory, and transfers the final effect processing result to a CPU memory. Further, it is also described that a CPU notifies the GPU of the kinds and the order of a plurality of effects to be executed by the GPU.
In a case where a GPU executes effect processing on data a plurality of times as described in a technology of Patent Document 1, it is necessary to reserve buffers holding effect-processing-target data and buffers holding effect-processing-result data in a GPU memory for respective effects (initialization of GPU memory), and to set connection relations of the respective buffers according to the execution sequence of the respective effects.
Meanwhile, effect contents such as kinds, the number, an execution sequence, and the like of effects may be arbitrarily changed by a user. Changes of effect contents may require change of the number of buffers to be reserved in a CPU memory in a case where the number of effects is increased/decreased and the like. Because of this, in a case where a CPU memory is initialized and connection relations of the respective buffers are set every time effect contents are changed, small changes such as passing one of a plurality of effects or only changing an execution sequence of a plurality of effects require operation time for initializing a CPU memory/setting connection relations of the respective buffers, and the like, whereby there is a fear that the overall efficiency declines.